ARM — Änderungen 10012 → 10326

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'''ARM''' ('''A'''corn '''R'''isc '''M'''achine) sind 32-Bit-Prozessoren nach dem [[RISC]]-Prinzip.  
+
'''ARM''' ('''A'''dvanced '''R'''isc '''M'''achine, vormals'' '''A'''corn '''R'''isc '''M'''achine'') sind 32-Bit-Prozessoren nach dem [[RISC]]-Prinzip.  
  
 
== Eigenschaften ==
 
== Eigenschaften ==
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! Name !! CPU-Modus !! r15-Offset !! r14-Offset
 
! Name !! CPU-Modus !! r15-Offset !! r14-Offset
 
|-
 
|-
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| Reset || Supervisor (SVC) || 0x0000 || —
+
| Reset || Supervisor (SVC) || 0x00000000 || —
 
|-
 
|-
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| Undefined Instruction || Undefined Instruction (UND) || 0x0004 || +4
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| Undefined Instruction || Undefined Instruction (UND) || 0x00000004 || +4
 
|-
 
|-
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| Software Interrupt || Supervisor (SVC) || 0x0008 || +4
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| Software Interrupt || Supervisor (SVC) || 0x00000008 || +4
 
|-
 
|-
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| Prefetch Abort || Abort (ABT) || 0x000C || +4
+
| Prefetch Abort || Abort (ABT) || 0x0000000C || +4
 
|-
 
|-
−
| Data Abort || Abort (ABT) || 0x0010 || +8
+
| Data Abort || Abort (ABT) || 0x00000010 || +8
 
|-
 
|-
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| IRQ || IRQ || 0x0018 || +8
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| IRQ || IRQ || 0x00000018 || +8
 
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|-
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| FIQ || FIQ || 0x001C || +8
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| FIQ || FIQ || 0x0000001C || +8
 
|}
 
|}