Control Register — Änderungen 2490 → 3833

Zeile 77: Zeile 77:
  
 
==CR4==
 
==CR4==
 +
{| border=1
 +
!Bit
 +
!Funktion
 +
|-
 +
| Bit 0
 +
| '''VME''' ''Virtual 8086 Mode Extension''
 +
|-
 +
| Bit 1
 +
| '''PVI''' ''Protected Mode Virtual Interrupt''
 +
|-
 +
| Bit 2
 +
| '''TSD''' ''Time Stamp Disable''
 +
|-
 +
| Bit 3
 +
| '''DE''' ''Debugging Extension''
 +
|-
 +
| Bit 4
 +
| '''PSE''' ''Page Size Extension''
 +
|-
 +
| Bit 5
 +
| '''PAE''' ''Physical Address Extension''
 +
|-
 +
| Bit 6
 +
| '''MCE''' ''Machine Check Enable''
 +
|-
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| Bit 7
 +
| '''PGE''' ''Page Global Enable''
 +
|-
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| Bit 8
 +
| '''PCE''' ''Performance Monitoring Counter Enable''
 +
|-
 +
| Bit 9
 +
| '''OSFXSR''' ''Operating System Support for FXSAVE and FXSTOR''
 +
|-
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| Bit 10
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| '''OSXMMEXCPT''' ''Operating System Support for Unmasked SIMD Exception''
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|-
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| Bit 11-31
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| ''Reserviert''
 +
|}
 
== Weblinks ==
 
== Weblinks ==
 
* [http://www.intel.com/products/processor/manuals/index.htm Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide] (Kapitel 2.5)
 
* [http://www.intel.com/products/processor/manuals/index.htm Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide] (Kapitel 2.5)
  
 
[[Kategorie:Stub]]
 
[[Kategorie:Stub]]