Peripheral Component Interconnect — Änderungen 7216 → 7228

Zeile 143: Zeile 143:
  
 
==== Status-Register ====
 
==== Status-Register ====
−
''TODO''
+
 
 +
{| {{Prettytable}}
 +
! Bit !! Name !! Bedeutung
 +
|-
 +
| 3 || Interrupt Status || ''TODO''
 +
|-
 +
| 4 || Capabilities List || ''TODO''
 +
|-
 +
| 5 || 66 MHz Capable || ''TODO''
 +
|-
 +
| 7 || Fast Back-to-Back Transactions Capable || ''TODO''
 +
|-
 +
| 8 || Master Data Parity Error || ''TODO''
 +
|-
 +
| 10-9 || DEVSEL Timing || ''TODO''
 +
|-
 +
| 11 || Signalled Target-Abort || ''TODO''
 +
|-
 +
| 12 || Received Target-Abort || ''TODO''
 +
|-
 +
| 13 || Received Master-Abort || ''TODO''
 +
|-
 +
| 14 || Signalled System Error || ''TODO''
 +
|-
 +
| 15 || Detected Parity Error || ''TODO''
 +
|}
 +
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==== Command-Register ====
 
==== Command-Register ====