==CR0==

{| border=1
!Bit
!Funktion
|-
| Bit 0
| '''PE''' ''Protection Enable'' 
Schaltet den Protected-Mode Ein/Aus
|-
| Bit 1
| '''MP''' ''Monitor Coprocessor''
|-
| Bit 2
| '''EM''' ''Emulation''
|-
| Bit 3
| '''TS''' ''Task Switched''
|-
| Bit 4
| '''ET''' ''Extension Type
|-
| Bit 5
| '''NE''' ''Numeric Error''
|-
| Bit 6-15
| ''Reserviert''
|-
| Bit 16
| '''WP''' ''Write Protect''
|-
| Bit 17
| ''Reserviert''
|-
| Bit 18
| '''AM''' ''Alignment Mask''
|-
| Bit 19-28
| ''Reserviert''
|-
| Bit 29
| '''NW''' ''Not Write-throgh''
|-
| Bit 30
| '''CD''' ''Cache Disable''
|-
| Bit 31
| '''PG''' ''Paging''
Schaltet den Paging-Meschanismus Ein/Aus
|}
==CR1==
''Reserviert''

==CR2==
Enthält noch einem Page-Fault die lineare Adresse, die den Fehler verursacht hat.
==CR3==
{| border=1
!Bit
!Funktion
|-
| Bit 0-2
| ''Reserviert''
|-
| Bit 3
| '''PWT''' ''Page-level Writes Transparant''
|-
| Bit 4
| '''PCD''' ''Page-level Cache Disable''
|-
| Bit 5-11
| ''Reserviert''
|-
| Bit 12-31
| '''Page-Directory Base'''
Basis Adresse des Page-Directorys
|}

==CR4==
== Weblinks ==
* [http://www.intel.com/products/processor/manuals/index.htm Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide] (Kapitel 2.5)

[[Kategorie:Stub]]