{{Stub}} ==x86 CPU Register== {| {{Prettytable}} ! Bits || Register |- | 8 || AL, BL, CL, DL, AH, BH, CH, DH |- | 16 || AX, BX, CX, DX, DI, SI, BP, SP, CS, DS, ES, FS, GS, SS |- | 32 || EAX, EBX, ECX, EDX, EDI, ESI, EBP, ESP, EIP, EFLAGS |- | 80 || |- | 128 || XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7 |} ==x86-64 CPU Register== ===Allzweckregister=== {| | {| {{Prettytable}} ! colspan="8" align="center" | Bytes |- ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="8" align="center" | R?X |- | colspan="4" style="background:lightgrey" | | colspan="4" align="center" | E?X |- | colspan="6" style="background:lightgrey" | | colspan="2" align="center" | ?X |- | colspan="7" style="background:lightgrey" | | align="center" | ?L |- | colspan="8" style="background:lightgrey" align="center" | ? = A, B, C, D |} | {| {{Prettytable}} ! colspan="8" align="center" | Bytes |- ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="8" align="center" | R? |- | colspan="4" style="background:lightgrey" | | colspan="4" align="center" | R?D |- | colspan="6" style="background:lightgrey" | | colspan="2" align="center" | R?W |- | colspan="7" style="background:lightgrey" | | align="center" | R?L |- | colspan="8" style="background:lightgrey" align="center" | ? = 8, 9, 10, 11, 12, 13, 14, 15 |} |} ===Indexregister=== {| {{Prettytable}} ! colspan="8" align="center" | Bytes |- ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="8" align="center" | R?I |- | colspan="4" style="background:lightgrey" | | colspan="4" align="center" | E?I |- | colspan="6" style="background:lightgrey" | | colspan="2" align="center" | ?I |- | colspan="7" style="background:lightgrey" | | align="center" | ?IL |- | colspan="8" style="background:lightgrey" align="center" | ? = D, S |} ===Zeigerregister=== {| {{Prettytable}} ! colspan="8" align="center" | Bytes |- ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="8" align="center" | R?P |- | colspan="4" style="background:lightgrey" | | colspan="4" align="center" | E?P |- | colspan="6" style="background:lightgrey" | | colspan="2" align="center" | ?P |- | colspan="7" style="background:lightgrey" | | align="center" | ?PL |- | colspan="8" style="background:lightgrey" align="center" | ? = B, S |} ===Instruktionsregister=== {| {{Prettytable}} ! colspan="8" align="center" | Bytes |- ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="8" align="center" | RIP |- | colspan="4" style="background:lightgrey" | | colspan="4" align="center" | EIP |- | colspan="6" style="background:lightgrey" | | colspan="2" align="center" | IP |} ===Flagregister=== {| {{Prettytable}} ! colspan="8" align="center" | Bytes |- ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="8" align="center" | RFLAGS |- | colspan="4" style="background:lightgrey" | | colspan="4" align="center" | EFLAGS |} ===Segmentregister=== {| {{Prettytable}} ! colspan="2" align="center" | Bytes |- ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="2" align="center" | ?S |- | colspan="2" style="background:lightgrey" align="center" | ? = C, D, E, F, G, S |} ===SSE-Register=== {| {{Prettytable}} ! colspan="16" align="center" | Bytes |- ! width="30pt" | 15 ! width="30pt" | 14 ! width="30pt" | 13 ! width="30pt" | 12 ! width="30pt" | 11 ! width="30pt" | 10 ! width="30pt" | 9 ! width="30pt" | 8 ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="16" align="center" | XMM? |- | colspan="16" style="background:lightgrey" align="center" | ? = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 |} ===Floatingpointregister=== {| {{Prettytable}} ! colspan="10" align="center" | Bytes |- ! width="30pt" | 9 ! width="30pt" | 8 ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="10" align="center" | ST? |- | colspan="10" style="background:lightgrey" align="center" | ? = 0, 1, 2, 3, 4, 5, 6, 7 |} {| {{Prettytable}} ! colspan="16" align="center" | Bits |- ! width="30pt" | 15 ! width="30pt" | 14 ! width="30pt" | 13 ! width="30pt" | 12 ! width="30pt" | 11 ! width="30pt" | 10 ! width="30pt" | 9 ! width="30pt" | 8 ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="16" align="center" | Control Register |} {| {{Prettytable}} ! colspan="16" align="center" | Bits |- ! width="30pt" | 15 ! width="30pt" | 14 ! width="30pt" | 13 ! width="30pt" | 12 ! width="30pt" | 11 ! width="30pt" | 10 ! width="30pt" | 9 ! width="30pt" | 8 ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="16" align="center" | Status Register |} {| {{Prettytable}} ! colspan="16" align="center" | Bits |- ! width="30pt" | 15 ! width="30pt" | 14 ! width="30pt" | 13 ! width="30pt" | 12 ! width="30pt" | 11 ! width="30pt" | 10 ! width="30pt" | 9 ! width="30pt" | 8 ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="16" align="center" | Tag Register |} {| {{Prettytable}} ! colspan="10" align="center" | Bits |- ! width="30pt" | 9 ! width="30pt" | 8 ! width="30pt" | 7 ! width="30pt" | 6 ! width="30pt" | 5 ! width="30pt" | 4 ! width="30pt" | 3 ! width="30pt" | 2 ! width="30pt" | 1 ! width="30pt" | 0 |- | colspan="10" align="center" | FOP |}